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verilog-tools

Handy tools for easier Verilog development in Atom.

#verilog
#hdl

966

atomato

Convert a VHDL entity into a VUnit testbench, component, instance or signal definitions, using the clipboard. Convert a VHDL component into a diagram image.

#vhdl
#vunit
#fpga
#hdl

qarlosalberto

165

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verilog-tools

atomato